F5 PVA (Packet Velocity ASIC) Acceleration

作者:reistlin 发布时间:April 25, 2014 分类:自由点击

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The Packet Velocity ASIC (PVA) is a hardware acceleration chip that delivers high performance L4 throughput and Denial of Service (DoS) protection.

Full Acceleration (Full)

All traffic is load balanced using Layer 4 features, such as virtual servers that operate only on IP addresses and ports of incoming traffic. The Full acceleration mode is not compatible with Layer 7 features, such as cookie persistence, header insertion, and rules that operate on data payload content.

Partial Acceleration (Assisted)

The first packets in each connection are processed in software, and each packet thereafter is accelerated. This process allows the software to make decisions based on Layer 4 content, but accelerates the traffic once the load balancing or persistence determination has been made.

No Acceleration (None)

No traffic is accelerated.

Important: By changing this behavior you may experience a rare occurrence of a TMM traffic flow and full PVA flow using the same client-side ephemeral port.

Version 10.x

1) Log in to the BIG-IP LTM command line.

2) To change the PVA flow enforcement policy, type the following command:

tmsh modify /sys db pva.flowkeyspace.enforce value disable

3) To save the changes made to the bigpipe db database, type the following command:

tmsh save /sys config

4) To restart the pvad process, type the following command:

bigstart restart pvad

Version 9.x

1) Log in to the BIG-IP LTM command line.

2) To change the PVA flow enforcement policy, type the following command:

bigpipe db Pva.FlowkeySpace.Enforce disable

3) To save the changes made to the bigpipe db database, type the following command:

bigpipe save all

4) To restart the pvad process, type the following command:

bigstart restart pvad

下载 [Packet Velocity ASIC (PVA) Acceleration table for BIG-IP LTM versions 9.4.0 - 9.4.8.pdf]

下载 [Packet Velocity ASIC (PVA) Acceleration table for BIG-IP LTM versions 10.0.0 - 11.1.0.pdf]

标签: f5

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